module c3board_top(
	 input REFCLK,    // 25MHz Oscilator
	 input RESET,     // reset button
	
	output  [3:0] LED,             // LEDS
	output        USB_UART_TXD,
    input        USB_UART_RXD	     
);


wire clk;
wire rst;


//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Internal Oscilator IP
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
wire int_osc_clkout;
int_osc_ip int_osc_ip_inst (
	   .oscena    (1'b1),
	   .clkout    (int_osc_clkout)  // 100MHz
	);
 
 
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Integer PLL IP
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
wire pll_ip_clkout_200MHz;	
wire pll_ip_clkout_150MHz;
wire pll_ip_locked;
pll_ip pll_ip_inst (
		.refclk    (REFCLK),                 //  refclk.clk
		.rst       (1'b0),                   //   reset.reset
		.outclk_0  (pll_ip_clkout_200MHz),   // outclk0.clk
		.outclk_1  (pll_ip_clkout_150MHz),   // outclk0.clk
		.locked    (pll_ip_locked)           //  locked.export
	);
	
	
//assign clk = REFCLK;
//assign clk = int_osc_clkout;
assign clk = pll_ip_clkout_200MHz;

assign rst = RESET;



//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Counter : @200MHz PLL
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
reg [25:0] counter;
always @(posedge (clk) or negedge (rst) )
begin
  if(!rst)
    counter <= 24'd0;
  else
    counter <= counter+1;
end




//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Counter : @100MHz Internal Oscilator
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
reg [25:0] counter2;
always @(posedge (int_osc_clkout) or negedge (rst) )
begin
  if(!rst)
    counter2 <= 24'd0;
  else
    counter2 <= counter2+1;
end



//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// Output Assignments
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
assign LED = { counter[25:24], counter2[24], pll_ip_locked };

assign USB_UART_TXD = USB_UART_RXD; // Loopback RX<->TX 


endmodule